eusci_a_spi_ex1_slave.c

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/* --COPYRIGHT--,BSD
 * Copyright (c) 2017, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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#include "driverlib.h"
 
//*****************************************************************************
//
//*****************************************************************************
uint8_t transmitData = 0x01, receiveData = 0x00;
 
void main(void)
{
    //Stop watchdog timer
    WDT_A_hold(WDT_A_BASE);
 
    //Configure Pins for UCA0CLK, UCA0TXD/UCA0SIMO, UCA0RXD/UCA0SOMI
    //Set P3.0, P3.1, P3.2 as Module Function Input.
    GPIO_setAsPeripheralModuleFunctionInputPin(
            GPIO_PORT_P3,
            GPIO_PIN0+ GPIO_PIN1 + GPIO_PIN2
            );
 
    //Initialize slave to MSB first, inactive high clock polarity and 3 wire SPI
    EUSCI_A_SPI_initSlaveParam param = {0};
    param.msbFirst = EUSCI_A_SPI_MSB_FIRST;
    param.clockPhase = EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT;
    param.clockPolarity = EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH;
    param.spiMode = EUSCI_A_SPI_3PIN;
    EUSCI_A_SPI_initSlave(EUSCI_A0_BASE, &param);
 
    //Enable SPI Module
    EUSCI_A_SPI_enable(EUSCI_A0_BASE);
 
    EUSCI_A_SPI_clearInterrupt(EUSCI_A0_BASE,
            EUSCI_A_SPI_RECEIVE_INTERRUPT);
 
    //Enable Receive interrupt
    EUSCI_A_SPI_enableInterrupt(EUSCI_A0_BASE,
            EUSCI_A_SPI_RECEIVE_INTERRUPT
            );
 
    __bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, enable interrupts
}
 
//******************************************************************************
//
//This is the USCI_A0 interrupt vector service routine.
//
//******************************************************************************
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A0_VECTOR
__interrupt
#elif defined(__GNUC__)
__attribute__((interrupt(USCI_A0_VECTOR)))
#endif
void USCI_A0_ISR (void)
{
    switch(__even_in_range(UCA0IV, USCI_SPI_UCTXIFG))
    {
        case USCI_SPI_UCRXIFG:      // UCRXIFG
            //USCI_A0 TX buffer ready?
            while (!EUSCI_A_SPI_getInterruptStatus(EUSCI_A0_BASE,
                        EUSCI_A_SPI_TRANSMIT_INTERRUPT
                        ));
 
            //Transmit data to master
            EUSCI_A_SPI_transmitData(EUSCI_A0_BASE,
                    transmitData
                    );
 
            //Receive data from master
            receiveData = EUSCI_A_SPI_receiveData(EUSCI_A0_BASE);
 
            //Increment data to be transmitted
            transmitData++;
            break;
        default:
            break;
    }
}